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JAZZFIBER-V5串行 FPDP I/O模塊突破性能限制,適用于PMC和XNC總線形式


2008年8月21日,TEC Micro 推出高速信號(hào)傳輸處理產(chǎn)品JazzFiber-V5 FPDP(基于前面板數(shù)據(jù)端口)I/O 模塊。JazzFiber-V5模塊為單通道或者多通道ANSI/VITA 17.1-2003 Serial FPDP接口提供高速數(shù)據(jù)傳輸,并支持VITA17.2 標(biāo)準(zhǔn)。

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JazzFiber-V5 是第一款支持以下標(biāo)準(zhǔn)的串行前面板數(shù)據(jù)端口模塊:
* 四通道光纖接口 沒通道數(shù)據(jù)吞吐率達(dá)到6.4Gb/s
* 最新Xilinx Virtex 5 FPGA 處理芯片,包含F(xiàn)XT器件
* “常規(guī)”串行FPDP及VITA 17.2接口,提供通道綁定,高比特率和優(yōu)化的傳輸協(xié)議
* 512MB DDR3 memory 板上速率6.4GB/s
* PMC接口支持133MHz PCI-X 64-bit 的本地總線
* XMC接口支持PCI-E 1.0a x 8 2GB/s 全雙工傳輸
* 商業(yè)級(jí)、加固級(jí)空氣冷卻和加固級(jí)傳導(dǎo)冷卻

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Software drivers are available for Windows, Linux and VxWorks operating environments with support for a wide range of x86 and PowerPC host platforms with a common API with support for all Serial FPDP operating modes. The integrated firmware and software transparently support single Serial FPDP streams as well as logical streams using x2 and x4 channel bonding defined in VITA 17.2.


The JazzFiber-V5 is designed from the ground up to operate effectively in laboratory, rugged air-cooled, and rugged conduction-cooled environments meeting the needs of R&D and deployed applications.


JAZZFIBER-V5 KEY TECHNOLOGIES OVERVIEW


Front Panel I/O
The JazzFiber-V5 has four LC-style fiber optic transceivers mounted at the front panel of the module. The fiber optic transceivers may be ordered with either single or multi-mode fiber interfaces at either 850 or 1300 nm wavelengths. The baseline module supports baud rates of 2.5 Gb/s, with alternate speeds between 1.062 and 6.4 Gb/s available as options.

Virtex 5 FPGA
The JazzFiber-V5 uses a Xilinx Virtex-5 FPGA to implement the interface protocol, memory buffering, DMA engines, and local bus/fabric interface. The installed FPGA device depends on the number of channels and the serial baud rate, ranging from a two channel 2.5 Gb/s module which uses an LX50T, to a four channel 6.4 Gb/s module which uses an FX100T.

Serial FPDP Protocol
The JazzFiber-V5 implements the Serial Front Panel Data Port (FPDP) protocol, an open standard for sensor-to-processor data links defined by ANSI/VITA 17.1-2003. Serial FPDP provides low protocol overhead, support for synchronization primitives in the data stream and high efficiency.

Serial FPDP supports baud rates of 1.062, 2.125, and 2.5 Gb/s, with net data rates up to 247 MB/s after data encoding and protocol overhead. Serial FPDP has been deployed in a wide range of sensor I/O applications and is a well established tool for moving large amounts of data between external sensors and signal or data processor systems.

Serial FPDP Throughput

# of Fibers Baud Rate Throughput
One 1.062 Gb/s 105 MB/s
One 2.5 Gb/s 247 MB/s
One 6.4 Gb/s 633 MB/s
Four 2.5 Gb/s 997 MB/s
Four 6.4 Gb/s 2553 MB/s


DDR3 Memory Buffers
The JazzFiber-V5 uses the latest memory technology – DDR3 – to provide maximum memory throughput at 23% less power than DDR2 based memory. With four independent memory banks clocked at 400 MHz each, the buffer memory subsystem provides aggregate throughput of 6.4 GB/s, supporting full rate deep FIFO buffering of the maximum 25.6 Gb/s fiber optic capability. The baseline module has 512 MB of memory, which provides up to 500 ms of buffering at full 17.1 Serial FPDP rates, decoupling the module from local bus memory latencies. The module will support memory capacities of up to 2 GB when higher density memory devices are available in 2009.

The JazzFiber-V5 is available now with standard commercial delivery 8-10 weeks ARO.

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